Formal Verification Engineer About Solutions SoC Engineering

Join the Solutions SoC Engineering organization and help shape the future of silicon. We are building a world-class engineering organization focused on delivering innovative, high-performance, and energy-efficient SoC solutions that power next-generation computing across diverse markets.

As a rapidly growing global team, we bring together expertise across architecture, design, verification, emulation, FPGA, software, and post-silicon validation to deliver first-time-right silicon. Our engineers solve some of the industry's most challenging engineering problems using advanced verification methodologies, automation, and AI-driven tools while maintaining the highest standards of quality and execution.

Our culture is built on technical excellence, ownership, collaboration, and continuous learning. We invest in our people, encourage innovation, and provide opportunities to influence engineering methodologies, contribute across the product lifecycle, and grow alongside an organization that is defining the future of SoC engineering.

Role Overview

As a Formal Verification Engineer, you will apply state-of-the-art formal verification methodologies to complex IPs, subsystems, and SoCs. You will develop proof strategies, assertions, and scalable methodologies that improve design quality and accelerate verification closure.

Key Responsibilities

Develop and execute formal verification strategies for IP, subsystem, and SoC designs.
Develop SystemVerilog Assertions (SVA) and formal properties.
Apply property checking, protocol verification, equivalence checking, and formal analysis.
Own verification deliverables from planning through verification closure while ensuring quality, schedule, and execution commitments are met.
Architect, develop, and maintain reusable verification environments, verification IPs, methodologies, and automation.
Develop verification plans, test methodologies, test cases, and coverage closure strategies.
Drive functional, code, toggle, assertion, and coverage closure.
Debug RTL, testbench, integration, and system-level issues.
Collaborate with architecture, design, firmware, emulation, FPGA, validation, and post-silicon teams.
Leverage automation, scripting, and AI-assisted workflows to improve verification productivity.
Contribute to methodology improvements, documentation, and engineering best practices.

Required Skills and Qualifications

Bachelor's or Master's degree in a relevant engineering discipline.
4+ years of formal verification experience.
Strong understanding of formal verification methodologies and abstraction techniques.
Hands-on experience with Verilog, SystemVerilog, and SVA.
Understanding of temporal logic, protocol verification, and RTL analysis.
Strong analytical, debugging, communication, and collaboration skills.

Desired Skills and Qualifications

Experience with JasperGold, VC Formal, Questa Formal, or equivalent.
Knowledge of Arm architecture and AMBA protocols.
Experience with CDC/RDC, low-power, security, or equivalence verification.
Scripting and automation using Python, Tcl, Perl, or Shell.
AI-assisted verification and globally distributed engineering experience.

Accommodations at Arm

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email [HIDDEN TEXT] . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working at Arm

Arm's approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team's needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don't discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

Senior SoC Formal verification Engineer