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Python, Scripting, formal verification

Verilog, System Verilog, model checking, Abstraction Modeling, formal verification, Convergence Strategies, Logic Microarchitecture Fundamentals, Simulation Techniques, Equivalence Checking

Tcl, Python, Perl, JasperGold, VC Formal, Questa Formal, formal verification methodologies

Tcl, Perl, JasperGold, digital design concepts, Questa, VC Formal, systemverilog, debugging complex design bugs, convergence techniques, formal coverage metrics, RTL coding in Verilog, Formal OneSpin, formal verification, formal property specification