power integrity , Shell, Perl, Python, Tcl, Physical Design signoff, Ansys RedHawk, IR EM analysis, Cadence Voltus

Wireshark, Zigbee, Wlan, Thread, Python, Iperf, Ellisys sniffers, Bluetooth BR, LE Audio

redhawk , Python, Routing, Perl, Tcl, OCV, Signoff, CTS, Fusion Compiler, advanced packaging technologies, ICC2, SDC development, Tempus, hierarchical STA, SI Crosstalk, StarRC, POCV, Placement, UPF Low-Power, floorplanning, CRPR, MCMM timing closure, AOCV, ECO timing closure

Perl, Verilog, Python, spyglass, VHDL, DDR memory controllers, PCIe protocols

synopsys primetime , Synopsys FusionCompiler, Timing Signoff Tools, Physical Design Flow, SDC Proficiency, AI ML Integration, Advanced Node Experience, Advanced Clocking