code coverage , Verilog, Debugging, FPGA Design, Scripting, Regression Testing, Vcs, systemverilog, Uvm, Testbench Development, Simulation Tools, Functional Verification, Timing Analysis, SoC Verification, Verification Plan, Verdi

OASIS, Python, Shell, Perl, Tcl, PERC, LVS, CDL, Dfm, SVRF-based automation, Verilog netlists, XOR methodologies, layout connectivity, antenna density, ASIC physical verification, Spice, Cadence Pegasus, DEF, LEF, Siemens Calibre nmDRC, metal-fill, ERC, DRC, Synopsys ICV, GDSII

C, Perl, Arm, Python, RISC-V Assembly, digital Verification, Cadence SKILL, Mixed-signal Verification, Uvm, systemverilog, UVM testbench creation

Java, Kafka, Python, API design, Incident Management, Gcp, Distributed Systems, Kubernetes, Testing, Go, Alerting systems, Flink, Microservices architecture, developer tools, Streaming Data, SDKs, Monitoring

SystemVerilog Assertions (SVA), test environments , Gate-Level Simulation (GLS), Test Cases, Low power debug, Constrained-random verification environments, Uvm, systemverilog, Verification test benches, Formal tools, Verification methodologies, Coverage measures, formal verification

virtualization, Memory Management, Perl, Python, System Verilog, IP Sub System design verification, Functional Coverage, Trackers, Assertion, Checkers, HW-SW debug, Uvm, power management fundamentals, coherency protocols, DV test bench, Scoreboards, Post-Silicon bring-up, Virtual Memory concepts

Openmp, Valgrind, Hpc, RDMA, SVE, ARM Neon, RoCE, MPI, simd, AVX-512, DPDK, Purify

.NET, .Net Core, C#, Graphql, Kafka, Css3, Angular, Automated Testing, Git, Typescript, Javascript, Gcp, Docker, Html5, ASP.NET, Distributed Systems, Azure, Kubernetes, AWS, NoSQL databases, Microservices architecture, CI/CD pipelines, Service Bus