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Analog Layout Engineer |5-8 Yrs | Immediate Joiners ,Bangalore
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We are looking for talented Analog Layout Engineers with strong experience in advanced FinFET technologies to join a leading semiconductor project for a global client.
Key Requirements
✅5-8 years of relevant Analog Layout experience
✅ Expertise in FinFET technologies (7nm / 3nm)
✅ Strong understanding of Analog/Mixed Signal Layout concepts
✅ Experience working on advanced node designs and physical implementation
✅ Candidates from non-Intel client projects preferred
Additional Information
Job ID: 153635491
Skills:
Analog and Analog Circuits fundamentals, Circuit Design concepts, Layout Design for standard cells, CMOS process design rules
Skills:
Analog Mixed-Signal Layout, MOS resistor capacitor current mirror differential pair and analog IP layouts, DRC LVS ERC and PEX, advanced matching and layout techniques, Cadence Virtuoso Custom Compiler, FinFET advanced-node layout, lower-node technologies
Skills:
Schematic layout tools, Technical reports and communications, Design FMEA creation and revisions, Analog and digital design, Test plans and test reports
Skills:
Shell, Perl, Python, Tcl, Samsung 3nm, Cadence Layout XL, Register File Layout, Synopsys Custom Compiler, Calibre DRC, Samsung 4nm, TSMC 5nm, Skill, High-Density Memory Arrays, TSMC 2nm, Memory Compiler Layout, Memory Layout, Calibre PEX, Multi-Patterning Requirements, SRAM Layout, Calibre LVS, Cadence Virtuoso, ROM Layout, FinFET Technologies
Skills:
FD-SOI technologies, Calibre, Latch-up prevention, Analog Mixed-Signal IC Layout, Substrate isolation, GF22FDX
