Analog Layout Engineer
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Position: Analog Layout Engineer
Location: Bangalore
Experience: 3 to 10 Years
Job Description:
Regards,
Karthik Kumar
[Confidential Information]
Job ID: 153641053
Skills:
advanced matching and layout techniques, Cadence Virtuoso Custom Compiler, DRC LVS ERC and PEX, FinFET advanced-node layout, lower-node technologies, Analog Mixed-Signal Layout, MOS resistor capacitor current mirror differential pair and analog IP layouts
Skills:
shielding , DC-DC Converters, Common-centroid layout, PEX, BCD Bipolar-CMOS-DMOS technology, LVS, Interdigitated structures, Calibre, Latch-up prevention, Analog layout techniques, Buck Converters, ERC, DRC, ESD-aware layout practices, Cadence Virtuoso, Guard rings, Device matching, Symmetry
Skills:
Synopsys IC Validator, Calibre DRC LVS PEX, high-speed analog and mixed-signal layout design, Custom Compiler, LVS, Cadence Pegasus, DRC, Cadence Virtuoso Layout Suite, ERC checks, 7nm FinFET technology
Skills:
analog circuits , Circuit Design, Custom Layout, Mentor, LVS, Physical Verification, EDA Tools, DRC, Synopsys, Cadence Virtuoso, Layout Design, Siemens tools
Skills:
manufacturing processes , Calibre, Analog Layout, Cadence Virtuoso XL, Design for manufacturability, Signal integrity analysis, Parasitic Extraction
