DFT ATPG Engineer
DFT ATPG Engineer
Tekwissen- Posted a month ago
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Job Description
Overview:
TekWissen is a global workforce management provider throughout India and many other countries in the world.
Position:DFT ATPG Engineer
Location: Bangalore
Work Type: Onsite
Job Type: Full time
Job Description:
- Minimum 4+ years of experience in ATPG and GLS
- Good understanding of ATPG and DRC Analysis in ATPG
- Handson in debugging low coverage
- Handson in Simulation in no timing and timing with good debugging skills
- Exposure to Silicon debug on ATE is an addon
TekWissen® Group is an equal opportunity employer supporting workforce diversity.
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Key Skills
About Company
Skills:
SSN LBIST, MBIST insertion simulation and debug on RTL and gates netlist, Verilog Hdl, At-Speed LBIST coverage analysis, STA DFT Test mode timing constraint development and analysis, Simulators and waveform debugging tools, Scan ATPG with SSN Stuck-At, Scripting with Perl Tcl, ATE silicon debug, Simulation and debug, Scan insertion with compression, Boundary Scan insertion simulation and verification
Skills:
Scan Insertion, ATE patterns, Test Static Timing Analysis, JTAG protocols, ATPG, Post-silicon validation and debug, BScan, P1687, Gate level simulation debugging