Search by job, company or skills

P

FPGA Design Engineer

3-12 Years
Save
  • Posted a month ago
  • Over 50 applicants
Quick Apply

Job Description

Key Responsibilities:

  • Design, implement, and simulate integrated circuitry using Verilog and SystemVerilog.
  • Develop FPGA designs using tools such as Xilinx Vivado and Altera Quartus; experience with Synopsys Synplify or Protocompiler is a plus.
  • Define timing constraints, perform floorplanning, and conduct static timing analysis to ensure robust designs.
  • Work with high-speed interfaces such as Ethernet, DDR, and LPDDR memory.
  • Implement and integrate peripheral protocols including I2C, SPI, and UART.
  • Collaborate with embedded software teams when required to support processor-driven FPGA designs.
  • Troubleshoot, debug, and optimize FPGA designs to meet functional and performance requirements.
  • Document design processes, simulation results, and maintain clear communication with team members.
  • Participate in team discussions and contribute to improving design methodologies and practices.

More Info

Job Type:
Industry:
Function:
Employment Type:

About Company

Proxelera is your premier outsourced product development partner (OPD), specializing in Semiconductors, Systems, and Bespoke Hardware. Proxelera combines process rigour with advanced technical expertise to deliver transformative solutions while fostering industry-academia collaboration and VLSI talent development.

Job ID: 133332167

Similar Jobs

Bengaluru, India

Skills:

UartSpiPcieVerilogI2cUnix SystemsOtnUvmMicrosemi FPGAssystemverilogEthernet-based protocolsquartusVHDLscripting toolsVivadoVMMAXI memory controllersLibero

Bengaluru, India

Skills:

FPGA DesignStatic Timing AnalysisSynthesisTiming ClosuresystemverilogCode coverage analysisRTL design using Verilog

Bengaluru, India

Skills:

memory controllers UartSpiHdl LanguagesPcieVerilogI2cUnix SystemsOtnUvmMicrosemi FPGAssystemverilogEthernet-based protocolsAxiquartusVHDLscripting toolsVivadoVMMLibero

Bengaluru, India

Skills:

hardware bring up TclCFPGA DesignSystem VerilogPythontest benchesRtl DesignUVM verification flowSynthesisTiming ClosureVerificationDebugSimulation

Bengaluru, India

Skills:

Fast Fourier TransformDigital Signal ProcessingVerilogSystem VerilogXilinx FPGA architecturesFPGA developmentOFDMcomplex algebraVivadoRtl Designlinear algebraAXI4 LiteAXI4 Streambaseband processing