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Senior DFT Engineer
scaledge technology

Senior DFT Engineer

scaledge technology
8-10 Years
Not Disclosed
  • Posted a month ago
  • Be among the first 10 applicants

Job Description

Hiring: Senior DFT Engineer | Bangalore | 8+ Years Experience

We are looking for an experienced Senior DFT (Design for Testability) Engineer to join our growing semiconductor team in Bangalore. If you have strong expertise in DFT architecture, scan implementation, MBIST, and boundary scan methodologies, we'd love to connect with you!

Key Responsibilities:-

Define and implement Scan Architecture, including EDT/OCC integration.

Perform DFT implementation, debug, and analysis across complex SoC designs.

Execute and validate Memory & IP Test Simulations involving:

MBIST

IJTAG

Boundary Scan (JTAG)

Drive pattern generation, validation, and retargeting activities.

Collaborate with design, verification, and physical design teams to ensure high-quality DFT deliverables.

Interested candidates can share their updated resume at [Confidential Information]

More Info

Job Type:
Permanent Job
Industry:
Semiconductor Manufacturing
Function:
Semiconductor
Employment Type:
Full time

Key Skills

DFT architecture

pattern generation validation

MBIST

EDT OCC integration

Boundary Scan JTAG

retargeting
boundary scan

Scan Architecture

IJTAG

DFT implementation debug

scan implementation

Memory IP Test Simulations

About Company

Last Updated: 24-10-2026 07:40:32 PM

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